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Ruth Padel

Original file (SVG file, nominally 257 × 162 pixels, file size: 5 KB)

Summary

Description
English: An implementation of a cascaded implementation, which used de Morgan's laws to convert or(or(a,b,c),or(d,e,f),or(g,h,i)) into nand(nor(a,b,c),nor(d,e,f),nor(g,h,i)). This is more efficient on logic families such as CMOS, NMOS or TTL where an OR gate needs to be synthesized from a NOR gate and an inverter.
Date
Source Own work
Author Trex4321

Licensing

I, the copyright holder of this work, hereby publish it under the following license:
Creative Commons CC-Zero This file is made available under the Creative Commons CC0 1.0 Universal Public Domain Dedication.
The person who associated a work with this deed has dedicated the work to the public domain by waiving all of their rights to the work worldwide under copyright law, including all related and neighboring rights, to the extent allowed by law. You can copy, modify, distribute and perform the work, even for commercial purposes, all without asking permission.

Captions

An implementation of a 12-input OR gate via NOR and NAND gates

Items portrayed in this file

depicts

creator

some value

author name string: Trex4321
Wikimedia username: Trex4321

copyright status

copyrighted, dedicated to the public domain by copyright holder

copyright license

Creative Commons CC0 License

source of file

original creation by uploader

inception

4 February 2024

media type

image/svg+xml

checksum

7676d99905a728a2de0ea1a79b598b8cf1941172

determination method or standard: SHA-1

data size

5,322 byte

height

162 pixel

width

257 pixel

File history

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Date/TimeThumbnailDimensionsUserComment
current19:26, 4 February 2024Thumbnail for version as of 19:26, 4 February 2024257 × 162 (5 KB)Trex4321Uploaded own work with UploadWizard

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